28 lines
468 B
Makefile
Executable File
28 lines
468 B
Makefile
Executable File
SOURCES = $(wildcard *.c)
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TARGET = heis
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# top-level rule, to compile everything.
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all: $(TARGET)
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DEPS = $(wildcard *.d)
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OBJECTS = $(SOURCES:.c=.o)
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#link
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$(TARGET): $(OBJECTS)
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gcc -o $@ $^ -lpthread -g -lcomedi -lm
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#compile
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%.o : %.c
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gcc -o $@ $< -c -g -MMD -Wall
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# If explicit dependencies exist, add them
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include $(DEPS)
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# rule for cleaning re-compilable files.
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clean:
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rm -f $(TARGET) $(OBJECTS) $(DEPS)
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rebuild: clean all
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.PHONY: rebuild clean all
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